In chip production a lot of defects are caused by faulty wiring which has its origin in the wiring technology in particular if long distances on the chip has to be spanned.
For example wire and via opens are the major cause for defects in integrated circuit technologies used for wiring signal lines.
Those signal routings are in particular on VLSI chips implemented as trees. Such signal distribution tree structures for distributing signals, i.e. reset-signals, are developed as a plurality of signal tree sub branches to a lot of signal sinks.
For example VLSI designs typically contain high fan out signals that are distributed by buffer trees. Reset trees often distribute a signal to 100's of thousands of sinks. These distribution trees are broken down for electrical reasons to 10's of thousands of nets (distribution sub trees) with an average fan-out up to 100 pins.
If an open, an interruption of the signal conducting wiring, occurs in a single data line, the net causes a failure. Even if the rest of the distribution net would function properly. This would be the cause of a defect of the whole chip.